Senior Verification Engineer
NeuroBlade is looking for a Senior Verification Engineer to join our fast-growing engineering team. We are looking for brilliant and passionate people to join us and play a major role in building the next big thing in AI! If you enjoy working on cutting edge technologies and solving complex problems, and have team spirit and a can-do-attitude – Your place is with us!
Founded in 2017, NeuroBlade set out on a mission to redefine computer architecture for AI and other memory intensive tasks. We build high performance solutions for the rapidly growing AI market while lowering costs and power usage. NeuroBlade’s unique hardware solution paired with a complete end-to-end SW stack, enables businesses to take the next leap forward by increasing the efficiency and affordability of their devices from edge devices to data centers.
- Design, review and deploy UVM based verification environments in block level, cluster and full chip levels
- Verify the design and hunt for bugs
- Build sophisticated automated & randomized environments to cover all corners of the design
- Use state of the art verification tools and technologies
Nice to have:
- 5+ years of experience in chip verification
- In-depth Knowledge in VLSI verification flow, languages & concepts
- A deep understanding and proven experience in advanced dynamic verification processes
- Experience in verification environments using SystemVerilog UVM
- Scripting knowledge – perl, python, TCL, etc.
- Electronics Engineering degree from a leading institution
- Knowledge of AI/ML
- Experience in formal verification methods
- Experience in emulation systems
- Experience in logic design, circuit design, and full chip integration