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Title:   RTL Design Engineer
In this role, you will be:  

  • Writing detailed design specification and test plans for brand new modules designed from scratch
  • Working in close collaboration with algorithms developers, architects, analog designers and verification engineers.
  • Providing high-quality RTL description for the design.
  • Supporting design verification to insure bug-free first silicon.
  • Driving functional and code coverage as well as timing closure for your designs.
  • Supporting silicon bring-up, performance and power characterization
Required Qualifications:
  • RTL design using Verilog or System Verilog
  • Design of state machines, data paths, arbitration and clock domain crossing logic
  • Understanding of logic synthesis, timing constraints
  • Exposure to Design for Test, understanding of scan concept and writing DFT friendly RTL
  • Experience with bus protocols like AHB, APB
  • Previous experience in design of image sensor SoC is an advantage
  • BSc, or MSc degree in Electrical Engineering, Computer Engineering, or Computer Science

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